Deep In-memory Architectures for Machine Learning Springer, 2020 M. Kang, S. Gonugondla, and N. R. Shanbhag
Pipelined Adaptive Digital Filters Kluwer Academic Publishers, 1994 N. R. Shanbhag and K. K. Parhi
Signal processing for High-Speed Links Handbook of Signal Processing Systems, Springer, 2010 N. Shanbhag, A. Singer, and H.-M. Bae
VLSI architectures for Forward Error-Control Decoders The VLSI Handbook, CRC Press, 2007 A. Arshad, S.-J. Lee, M. Mansour, and N. R. Shanbhag
High-Speed Data Transmission over Twisted-Pair Channels Marcel Dekker, Inc., 1998 N. R. Shanbhag
Pipelined Adaptive Digital Filters Using Relaxed Look-ahead Microsystems Technology for Multimedia Application: An Introduction, IEEE Press, 1995 N. R. Shanbhag and K. K. Parhi
VLSI implementation of a 100 MHz pipelined ADPCM codec chip VLSI Signal Processing VI, IEEE Press, 1993 N. R. Shanbhag and K. K. Parhi