Naresh R. Shanbhag is the Jack Kilby Professor in the Department of Electrical and Computer Engineering, and in the Coordinated Science Laboratory at the University of Illinois at Urbana-Champaign. He is interested in the design of robust and energy-efficient information processing systems in nanoscale process technologies with applications involving machine learning, communications, signal processing. He received his doctorate from the University of Minnesota (1993) in Electrical Engineering. From 1993 to 1995, Dr. Shanbhag worked at AT&T Bell Laboratories at Murray Hill where he was the lead chip architect for AT&T's 51.84 Mb/s transceiver chips over twisted-pair wiring for Asynchronous Transfer Mode (ATM)-LAN and very high-speed digital subscriber line (VDSL) chip-sets. He was a visiting faculty at the National Taiwan University (August 2007-December 2007) and at Stanford University (August 2014-December 2014). Professor Shanbhag has authored more than 200 articles, holds twelve US patents and is the co-author of the research monograph Pipelined Adaptive Digital Filters published by Kluwer Academic Publishers in 1994.

Dr. Shanbhag received the 2018 SIA/SRC University Researcher Award, the 2010 Richard Newton GSRC Industrial Impact Award, became an IEEE Fellow in 2006, received the 2006 IEEE Journal of Solid-State Circuits Best Paper Award, the 2001 IEEE Transactions on VLSI Best Paper Award, the 1999 IEEE Leon K. Kirchmayer Best Paper Award, the 1999 Xerox Faculty Award, the Distinguished Lecturership from the IEEE Circuits and Systems Society in 1997, the National Science Foundation CAREER Award in 1996, and the 1994 Darlington Best Paper Award from the IEEE Circuits and Systems Society. Dr. Shanbhag is serving as the Associate Editor for the IEEE Journal on Exploratory Solid-State Computation Devices and Circuits. In the past, he served as an Associate Editor for the IEEE Transaction on Circuits and Systems: Part II (97-99) and the IEEE Transactions on VLSI (99-02 and 09-11), respectively. He served as the General Chair of the 2013 IEEE Workshop on Signal Processing Systems, the General co-Chair of the 2012 IEEE International Symposium on Low-Power Design (ISLPED), the Technical Program co-Chair of the 2010 ISLPED, and served on the technical program (wireline subcommittee) committee of the International Solid-State Circuits Conference (ISSCC) from 2007-11.

Dr. Shanbhag led the Alternative Computational Models in the Post-Si Era research theme, in the DOD and Semiconductor Research Corporation (SRC) sponsored Microelectronics Advanced Research Corporation (MARCO) center under their Focus Center Research Program (FCRP) from 2006-12. Since January 2013, he is the founding Director of the Systems On Nanoscale Information fabriCs (SONIC) Center, a 5-year multi-university center funded by DARPA and SRC under the STARnet phase of the FCRP to explore novel computing paradigms for the nanoscale era. In 2000, Dr. Shanbhag co-founded and served as the Chief Technology Officer of Intersymbol Communications, Inc., a venture-funded fabless semiconductor start-up that provided DSP-enhanced mixed-signal ICs for electronic dispersion compensation of OC-192 optical links. In 2007, Intersymbol Communications, Inc., was acquired by Finisar Corporation, Inc..